(Japanese ) English documentation of Turbo.PLL @ Fanatic Computers
Hirobo's documentation of Turbo.PLL
PLL (phased locked loop) . The PLL does frequency multiplication by using feedback in combination with division, a trick that enables you to finely tune the factor by which the input frequency gets multiplied.
crystal generates a 14.318MHz reference signal
replacing it with a 16MHz crystal implies new problems
CK100 has to have more than one PLL in it: one for the fixed outputs and one for the variable outputs.
Some motherboards with 48-pin CK100's like the IC-Works W144 generate the SDRAM clocks on the CK100 itself.
Many motherboard companies use the line of PLL-ICs available from IC-Works. The IC-Works W124 is a typical 24-pin PLL-IC.
Specification (the outline) of Turbo.PLL-01
Fixed frequency outputs
I. 14.318MHz x 3, 3.3V logic output, Dumping resistance installation
II. 24MHz x 1, 3.3V logic output, Dumping resistance installation
III. 48MHz x 1, 3.3V logic output, Dumping resistance installation
IV. 14.318MHz x 1/2 to x 2, About 7MHz-30MHz, AC cup ring output corresponding to the crystal oscillation circuit
+5V simple power supply
3.5inch FDD connector connection
3.3V regulator inclusion
Turbo.PLL can apply frequencies in the range of 7.159-28.636MHz to the CK100's crystal input.
Turbo.PLL works with the Asus P2B, some AOpen boards, the Abit BH6, and possibly all Slot 1 motherboards