identify CPU Transmeta

Transmeta

  dl $ info
TM3120
serial
 
  dl $ info
TM5200
TM160-00
 
  dl $ info
TM5400
serial
 
   
         
Crusoe "P95" (series A)
TM3120 (pre TM3200)
TM3200 (266-400MHz, 64d+32KB/0KB L1/L2, SD133, 474pin BGA, x86, integrated Northbridge, 0.22µ, 1.5V)
TM3300 (400-500MHz, 64d+64KB/0KB L1/L2, SD133, MPEG4, LongRun, 474pin BGA, x86, integrated Northbridge, 0.18µ)
TM3400 (400-600MHz, 64d+64KB/256KB L1/L2, SD133, MPEG4, LongRun, 474pin BGA, x86, integrated Northbridge, 0.18µ)
TM3500 (600MHz, ??/256KB L1/L2)

Crusoe (series B, 128bit VLSI)
TM5200 ??
TM5400 (500-667MHz, 64+64KB/256KB L1/L2, SD133/DDR166, 474pin BGA, x86, 1.1-1.6V, integrated Northbridge, 0.22µ, 5-4-3)
TM5500 (600-1000MHz, 64+64KB/256KB L1/L2, SD133/DDR166, 474pin BGA, x86, 0.9-1.3V, integrated Northbridge, 0.18µ)
TM5700 (1000+MHz, 64+64KB/256KB L1/L2, SD133/DDR166, 474pin BGA, x86, 0.9-1.3V, integrated Northbridge, 0.13µ)

TM5600 (500-700MHz, 64+64KB/512KB L1/L2, SD133/DDR266, 474pin BGA, x86, 1.1-1.6V, integrated Northbridge, 0.22µ)
TM5800 (600-1000MHz, 64+64KB/512KB L1/L2, SD133/DDR266, 474pin BGA, x86, 0.9-1.3V, integrated Northbridge, 0.18µ)
TM5900 (1000+MHz, 64+64KB/512KB L1/L2, SD133/DDR266, 474pin BGA, x86, 0.9-1.3V, integrated Northbridge, 0.13µ)

TM5xxx ('Astro', 256bit core, high speed bus, AGP Northbridge, 128KB L1, 2MB L2 on-die, 0.13µm, 0.5W, 1.4GHz)

TM6000 (1GHz+, Northbridge, Southbridge, 0.10µm, AMD x86-64 ?)

Efficeon (256bit VLSI / 8x32Bit instruction)
TM8000 (F-2-4, 'Astro', 1.4GHz, 0.13µm, 128+64/1024KB L1/L2, Northbridge DDR400, AGPx4, HyperTransport, LPC)
TM8300 512KB L2
TM8600 1024KB L2
TM8620 Small Package TM8600

  CMS 4.1 CMS 4.2 CMS 4.3
MHz [V] [V] [V]
667 1.6 1.5  
633 - 1.4  
600 1.5 -  
533 1.35 1.3  
500 - 1.2  
400 1.225 1.0  
300 1.2 -  
CMS - Code Morphing Software
Versions up to 4.2 are 1024KB, 4.3+ are 2048KB