almanach CPU Cyrix 80x86
Cx486SLC/DLC/SRx/DRx M4
Cx486S M5
Cx486DX/DX2/DX4 M6/M7/M8
Cyrix 5x86 M9 / M1sc "Chili"
MediaGX (Graphic eXtension)
Cyrix M1 1996
Cyrix M2 / MII+ 1997"Cayenne"
Cyrix M3 / M-III / 6x86MXe
www.cyrix.com (subsidiary of VIA
since 1999)
Cyrix 6x86 marking
& reference
EMC87
82S87
83S87
83D87NPX
math co-pro
Cx486D
40MHz, 1993
4-0-1..2
Cx486SLC
25..40MHz, 386, 1KB L1
386SX pin compatible
00h
Cx486SLC (e/e-V)
25..40MHz, 386, 1KB L1
386SX pin compatible
01h
Cx486DLC
25..40MHz, 386, 1KB L1
386DX pin compatible
01h
Cx486DLC rev.AB
25..40MHz, 386, 1KB L1
fixed coCPU problems
02h
Cx486SLC2
50MHz, 386, 1KB L1
03h
Cx486DLC2
40..80MHz, 386, 1KB L1
04h
Cx486SRx
486
05h
Cx486DRx
16..33MHz, 486
06h
Cx486SRx2
33..50MHz, 486
07h
Cx486DRx2
33..66MHz, 486, 1993
09h
Cx486DRu
16..25MHz
486DLC w/ addon HW
0Bh
Cx486DRu2
33..50MHz
08h
Cx486SRu
0Ah
Cx486SRu2
10h
Cx486S -V
33..50MHz, 1993
11h
Cx486S2 -V
40..50MHz, 1993
12h
Cx486Se -V
33..50MHz, 1993
13h
Cx486S2e -V
40..50MHz, 1993
1Ah
Cx486DX
33..50MHz, 1993
"-V33" low voltage
1Bh 0-0-7
Cx486DX2
40..80MHz, 1993
"-V33" low voltage
1Bh 4-8-0
Cx486DX2 -V
66..80MHz, 0.65µm
1Fh
Cx486DX4
75..100MHz
FDh
Cx486DX4
overdrive
28h
1x Clock
16KB L1
2Ah
1x Clock
16KB L1
29h
2x Clock
16KB L1
2Bh
2x Clock
16KB L1
2Dh
3x Clock
16KB L1
2Fh
3x Clock
16KB L1
2Ch
4x Clock
16KB L1
2Eh 4-9-X
4x Clock
100..120MHz, 0.65µm
16KB L1
4-4-X
GX, 120..133MHz, 1997
0.6µm
5-4-X
GXi, 150..180MHz, 1997
0.5µm
5-4-X
GXm, 200..266MHz, 1998
0.5µm
canceled
MXi (Cayenne), 333..400MHz
0.25µm, MMX, 3DNow
100MHz core, 64KB L1
30h 5-2-0
6x86
0.65µm
5-2-2
6x86 (2.4..2.5)
0.5/0.44µm
6x86 (2.6) P166..200
0.44µm
L1 problem (NT)
6x86 (2.7..3.7) P166..200
0.4µm
5-3-0
6x86L (4.1..4.2) P120..200
"M1R"
0.35µm
split voltage
6x86LV P150..200
0.35µm
6-0-0
6x86MX (1.2) CPUID bug
0.35µm, MMX
66MHz core, 64KB L1
6x86MX (1.3..1.4)
0.35µm, MMX
66MHz core, 64KB L1
6-0-1
6x86MII
0.25µm, MMX
100MHz core, 64KB L1
canceled
6x86MII+ "Gobi / Jedi"
0.25µm, MMX, 3DNow
64KB L1, 256KB L2, Socket370
Go
for VIA processors
Joshua "Gobi / Jedi",
350+MHz
0.18µm, FSB133
MMX, 3Dnow, 64KB L1 256KB
L2
canceled
20/03/2000
M3 "Mojave / Jalapeno",
VGA on die
0.18µm, FSB150, 600+MHz
32KB L1, 256KB L2
canceled
M4 "Serrano"
Note
For the MII+: Jedi was original project name at Cyrix, Gobi at NationalSemi and
Joshua at VIA times.
For the M3: Jalapeno was project name at Cyrix and Mojave at NationalSemi times.
Cayenne is core chip for Cyrix MXi and Gobi.
First Cyrix 6x86MX were fabbed by IBM. Some chips were sold under brand of IBM
for lower prices than Cyrix' own. For this and the takeover by NationalSemi the
processor was renamed to MII. So there are different processor layouts with the
same core.
1. Cyrix 6x86MX (IBM fabbed, 0.35ym)
2. IBM 6x86MX (IBM fabbed, 0.25ym)
3. Cyrix MII (IBM fabbed, 0.3ym)
4. Cyrix MII (NatSemi fabbed, 0.25ym)
Cyrix 5x86 is a stripped down version of 6x86 (-50% transistor count but only
-20% performance) for 486 mainboards. MediaGX is successor of 5x86.