almanach RAM

RAM / ROM / PROM / EPROM / EEPROM

tagRAM, CacheRAM, L1, L2, L3
UMC UM61-3264F-6

SRAM
DRAM
EDO (DRAM that has enhanced readability in the Extended-Data-Out mode.)
VRAM (DRAMs equipped with a second data port for display refresh operation)
WRAM
embedded DRAM, FeRAM
SDRAM (PC66, PC100, PC133) intel spec
SDRAM (Synchronous DRAM which reads or writes can be performed synchronously with the memory clock.) HSDRAM (High Speed PC150)
SGRAM (RAM that is optimized for graphics use. SGRAM is capable of running at much higher speeds than fast page or EDO DRAM. SGRAM is able to execute a small number of frequently executed operations, such as buffer clears, specific to graphics applications independently of the controller.)
Burst SRAM
DirectRambus RAM (see RAMBUS Inc. for reference)
SLDRAM (SyncLink DRAM) see SLDRAM Inc. for reference
DDR RAM (Dual Data Rate RAM)
DDR-2 RAM (successor to DDR RAM developed by former SLDRAM consortium, now Advanced Memory International)

  EDO SDRAM DDR SDRAM SLDRAM Direct RDRAM
Peak Bandwidth 66MB/sec 125MB/sec 200MB/sec 400MB/sec 1600MB/sec
MHz 66 MHz 125 MHz 200 MHz 400 MHz 800 MHz
Standard Body JEDEC JEDEC JEDEC AMII Rambus
Availability 1995 1997 1998 1999 1999
Voltage 3.3 3.3V 3.3V 2.5V 2.5V

name spec Access time MHz 64bit Data transfer (GB/s)
ns MHz 1G=1000M 1G=1024M
DDR1 DDR200 10.0 100.0 200.0 PC1600 1.6 1.5
DDR266 7.5 133.3 266.7 PC2100 2.1 2.0
DDR333 6.0 166.7 333.3 PC2700 2.7 2.5
DDR2 DDR400 5.0 200.0 400.0 PC3200 3.2 3.0
DDR533 3.75 266.7 533.3 PC4300 4.3 4.0
DDR3 DDR667 3.0 333.3 666.7 PC5400 5.3 5.0
DDR800 2.5 400.0 800.0 PC6400 6.4 6.0
QDR   10.0 100.0 400.0   3.2 3.0
  7.5 133.3 533.3   4.3 4.0
  6.0 166.7 666.7   5.3 5.0

30 pin SIMM (8bit wide)
72 pin SIMM (PS/2, 32bit wide)
72 pin DIMM (S0-DIMM)
?? pin DIMM (micro DIMM)
100 pin DIMM (static / EDO)
144 pin DIMM (S0-DIMM)
168 pin DIMM (SDRAM, 64bit wide)
184 pin DIMM (DDR)

Parity
ECC
Advanced ECC (chipkill)

double-sided vs. single-sided SIMM
(DS SIMMs have four RAS lines, SS SIMMs have two RAS lines)

FRAM ferro-electric

FMRAM ferro-magnetic

MRAM magnetic (IBM patent 1974)

TSOP, TinyBGA, SIM-BGA, FlipChip

DIP (dual inline package)
SIPP (single inline pinned package)
SIMM (single inline memory module)
DIMM (dual inline memory module)
interleave

PS/2
FPM (fast page mode), EDO (extended data out), BEDO (burst EDO)
80, 70, 60, 50ns

Burst SRAM 2 1 1 1  
SDRAM 5 1 1 1  
BurstEDO 5 1 1 1  
EDO 5 2 2 2  
FP 5 3 3 3
lead-off adress

DIMM
PC-66, PC-100, PC-133 (15, 12, 10, 7, 5ns)
intel specs for SDRAM
32MB DIMM (2x16MB Single RAS or 1x32MB Dual RAS)
SDRAM (synchronous dynamic RAM)
SO-DIMM

PC100 spec (intel)
PCX-abc-def R
a CAS latency 2/3
b RAS-to-CAS latency
c RAS PreCharge time
d output valid from clock (ns) 6 (or 7 for only 2DIMM)
e SPD-EEPROM version 1.x (or only x)
f reserved 0
R registered buffered (without R unbuffered)

access times
Clock (MHz) access time (ns)
100 10.0
105 9.5
111 9.0
118 8.5
125 8.0
133 7.5
143 7.0
154 6.5
167 6.0
182 5.5
200 5.0
  4.5
250 4.0
262.5 3.8
275.0 3.6
300.0 3.3
357.5 2.8

5V, 3.3V, 2.0V

SPD-EEPROM (SPD - serial presence detect)
RAM timings
CAS Latency/RAS to CAS delay / RAS Precharge time / DRAM idle time
2/2/2/8 (fast)
3/2/2/8 (med)
3/3/3/10 (slow)
CAS Latency (CL2 /CL3 label)

unbuffered
buffered (registered) [see large buffering chip below RAM chips]

10 pins - 1st notch - 28 pins - 2nd notch - x pins
1st notch (left - ; center - buffered; right - unbuffered)
2nd notch (left - 5.0V, center - 3.3V; right - )
Most SDRAM DIMMs follow an unbuffered 3.3V layout regardless of its real specifications. So be careful inserting the
correct RAM in the module slots on the mainboard.

SPD/PPD EEPROM
SPD (serial presence detect) for DIMM [8bit EEPROM]
PPD (parallel presence detect) for SIMM
PPD is set using resistors to connect pins, as shown below:

4MB 8MB 16MB
Pin # 60ns 70ns Pin # 60ns 70ns Pin # 60ns 70ns
67 VSS VSS 67 NC NC 67 VSS VSS
68 VSS VSS 68 NC NC 68 NC NC
69 NC VSS 69 NC VSS 69 NC VSS
70 NC NC 70 NC NC 70 NC NC
 
32MB 64MB 128MB
Pin # 60ns 70ns Pin # 60ns 70ns Pin # 60ns 70ns
67 NC NC 67 VSS VSS 67 NC NC
68 VSS VSS 68 NC NC 68 VSS VSS
69 NC VSS 69 NC VSS 69 NC VSS
70 NC NC 70 NC NC 70 NC NC
 
NC - not connected

SDRAM II (DDR-DualDataRate) vs. RDRAM (Direct RAMbus - Rambus Inc.)
nDRAM (RDRAM-II)
SLDRAM (Sync Link DRAM)
RIMM (Rambus Inline Memory Module)
CRIMM (Continuity RIMM)

VC-SDRAM (Virtual Channel), VCM (VC-Memory)
AMII (AMI2) Advanced Memory International Inc.
DDR, DDR2

DRAM operational mode
Asynchronous (PageMode, FastPage FP, HyperPage EDO, BurstHyperPage BEDO)
Synchronous (JEDEC, PC100/133, DDR, Enhanced)
ProtocolBased (DRDRAM, SLDRAM)

Advanced chipkill memory
RAM modules with an extra ASIC for RAID5 functionality. So even if a complete module fails it can be replaced without data loss (IBM development)

Bank
A slot or group of slots, usually on a system board, that are populated by memory modules of the same capacity, type and speed.

Bit
Binary Digit - the smallest piece of data (a 1 or a 0) that a computer recognizes.

Byte
A series of 8 bits.

Clock Rate
The number of pulses emitted from a computer's clock in one second. This determines the rate at which logical or arithmetic gating is performed in a synchronous computer.

DDR SDRAM (SDRAM II)
Double Data Rate SDRAM. Same as SDRAM, but data is transferred at twice the rate.

DIMM
Dual Inline Memory Module. A module with signal and power pins on both sides of the memory module.

DRAM
Dynamic Random Access Memory is most commonly used type of computer memory. It usually uses one transistor and a
capacitor to represent a bit. The capacitors must be energized hundreds of times per second in order to maintain the charges. Unlike firmware chips
(ROMs, PROMs, etc.) both major varieties of RAM (dynamic and static) lose their content when the power is turned off.

ECC
Error Checking and Correction. A method of detecting and correcting system memory errors by adding additional bits and using a special algorithm.

EDO
EDO (Extended Data Out) DRAM technology shortens the read cycle between memory and the CPU. On computer systems designed to support it, EDO memory allows a CPU to access memory 10 to 20 percent faster than comparable fast-page mode chips. Back-to-back memory accesses occur much faster.

FPM
Fast Page Mode DRAM. A feature used to support faster sequential access to DRAM by allowing any number of accesses to the currently open row to be made after supplying the row address just once.

Gigabit (Gb) = 1,000 Megabits. 1Gb = 1,073,741, 824 bits.

Gigabyte (GB) = 1,000 Megabytes. 1GB = 1,073,741, 824 bytes.

JEDEC
Joint Electronic Device Engineering Council. This organization develops industry standards for electronic devices.

Lead
The leg or contact point of the component that is placed within a socket for connection.

Megabit (Mb) = 1,000 Kilobits. 1Mb = 1,048,576 bits.

Megabyte (MB)= 1,000 Kilobytes. 1MB = 1,048,576 bytes.

Nanosecond (ns)
One billionth of a second.

Printed Circuit Board (PCB)
A flat board that holds chips and other electronic components. The board is made of reinforced fiberglass or plastic and interconnects components via copper pathways. The main printed circuit board in a system is called a system board or motherboard, while
smaller ones that plug into the slots in the main board are called boards or cards.

Random Access Memory (RAM)
A group of memory chips, typically of the dynamic RAM (DRAM) type, which functions as the computer's primary workspace.

RDRAM (Direct Rambus)
RDRAM is a unique design developed by a company called Rambus, Inc. RDRAM is extremely fast and uses a narrow, high-bandwidth “channel” to transmit data at speeds about ten times faster than standard DRAM. Two other flavors of RDRAM are also soon to arrive: Concurrent and Direct RDRAM. Concurrent is based on the fundamental design of the standard RDRAM, yet is enhanced to increase speed and performance. Direct is also based on RDRAM, yet through additional enhancements will be even faster than concurrent RDRAM.

Refresh
To continuously charge a device that cannot hold its content. CRTs must be refreshed, because the phosphors hold their glow for only a few milliseconds. Dynamic RAM chips require refreshing to maintain their charged bit patterns.

SDRAM
Synchronous DRAM uses a clock to synchronize signal input and output on a memory chip. The clock is coordinated with the CPU clock so the timing of the memory chips and the timing of the CPU are “in sync”. Synchronous DRAM saves time in executing commands and transmitting data, thereby increasing the overall performance of the computer. In pure speed tests, SDRAM is about 50 percent faster than EDO memory, with actual performance gains of around 25 percent.

SGRAM
A type of dynamic RAM chip that is similar to the SDRAM technology, but includes enhanced graphics features for use with display adapters. Its Block Write and Mask Write functions allow the frame buffer to be cleared faster and selected pixels to be modified faster.

Single Inline Memory Module (SIMM)
A module with signal and power pins on one side of the memory module.

SLDRAM
Formerly known as "SyncLink DRAM," it uses a revolutionary bus interface similar to RDRAM but is being standardized in JEDEC as an open standard. SLDRAM is an enhanced line extension of SDRAM architecture that extends the current four-bank design to 16 banks.

Small Outline Dual Inline Memory Module (SODIMM)
A DIMM module with a thinner profile due to the use of TSOP chip packages. SO DIMMs are commonly used in laptop computers.

Small Outline J-lead (SOJ)
A small-dimension, plastic, rectangular surface mount chip packages with j-shaped pins on its two long sides.

Static Random Access Memory (SRAM)
A memory chip that requires power to hold itsí content. Static RAM chips have access times in the 10 to 30-nanosecond range. Dynamic RAMs are usually above 30ns, and Bipolar and ECL memories are under 10ns.

Thin Small Outline Package (TSOP)
A very-thin, plastic, rectangular surface mount chip package with gull-wing pins on its two short sides. TSOPs are about a third as thick as SOJ chips.

Video Random Access Memory (VRAM)
Is a type of memory used in a display adapter. It is designed with dual ports so that it can simultaneously refresh the screen while text and images are drawn in memory. It is faster than the common dynamic RAM (DRAM) used as main memory in the computer.